GSRmonitor

A validation platform for the HEEPidermis [1] Galvanic Skin Response (GSR) SoC for real time stress and fear monitoring in high risk environments.

GSRmonitor board render

Project Overview

GSRmonitor is a discrete validation platform for HEEPidermis [1], a low power SoC for Galvanic Skin Response (GSR) measurents for physiological stress and fear monitoring in high-risk environments, developed at the Embedded Systems Laboratory (ESL) at EPFL. The board was designed to emulate the analog front-end and data acquisition concepts behind the SoC before it was integrated into a custom silicon and taped out.

System Architecture

The analog front end is centered around a 16-bit current DAC that can sink programmable excitation currents from 40 nA up to 10 μA. A set of on board loads allows the user to validate the iDAC and readout chain, including an 8-bit 100 kΩ digital rheostats, three fixed precision resistors (100 kΩ, 470 kΩ and 1 MΩ) and three rheostats (100 kΩ, 500 kΩ and 2 MΩ). These can be selected using the on-board DIP switches, as shown in Figure 1. For actual measurements, the same excitation path can be routed to external electrodes through dedicated connectors.

Figure 1: GSRmonitor pinout diagram

Figure 1: GSRmonitor pinout diagram.

On the acquisition side, two externally controlled sample-and-hold stages can be used to emulate a level-crossing ADC, used in the SoC for ultra-low-power operation. A regular 12 bit sigma-delta ADC can also be used for more traditional continuous sampling if needed.

Power and Interface

Because GSR signals are small and highly sensitive to noise, particular care was taken in the power tree. The board can be powered either from an external LiPo/Li-Ion battery pack or from a bench power supply. An integrated charger with load-sharing allows the system to run while the battery is charging. Downstream, two high PSRR, low noise LDOs followed by additional filtering stages provide clean power rails for the current source and ADC front-end.

On the digital side, GSRmonitor communicates over I2C and supports logic levels between 1.65 V and 5.5 V, which makes it compatible with most microcontrollers and SoCs used in the market. The Github repository includes an microcontroller-agnostic library and example sketches that allow for an easy bring-up.

References

[1] J. Sapriza et al., "HEEPidermis: a versatile SoC for BioZ recording," arXiv preprint arXiv:2509.04528, 2025. [Online]. Available: https://arxiv.org/abs/2509.04528.